Current Projects


Data Processing Unit (DPU)

Reducing the amount of scientific data is crucial due to the limited spacecraft telemetry rate. This is achieved at two levels: hardware-based integration within the sensor electronics and subsequent S/W processing. All S/W processing is performed in the DPU by a 32-bit digital signal processor (DSP, TSC21020F) with a large and fast SRAM memory (3 Mbyte program, 8 Mbyte data memory). Principal drivers of the DPU design are an optimum use of the allocated telemetry rate, a single-failure tolerance for all functions serving more than one sensor, and independence of availability of radiation hardened parts. All DPU functions are duplicated and organized into two independent (cold redundant) branches, except from the three sensor interfaces and the hard core for selection of the active branch. The DPU S/W design is based on the real-time multitasking operating system Virtuoso.
The DPU was extremely reliable. The redundant part was never used as there was no need.